This invention relates generally to parallel data buses and, more particularly, with properly testing the integrity of such buses.
High speed parallel data busses, such as those used to implement the Small Computer System Interface (SCSI) standard, are typically made up of many parallel signal transmission line conductors combined into a single cable or printed circuit backplane. For example, current sixteen-bit SCSI cables have sixty-eight conductors arranged as thirty-four twisted pair transmission lines. Twenty-seven of these pairs are used to carry data and control signals, while the remainder is used for power and ground. Terminators are used at each end of the bus to prevent signal reflection and to hold each signal line at a specified voltage level when it is not being driven.
Because there are so many conductors in each SCSI cable, and because many such cables can be daisy-chained together to form a long SCSI bus, such a bus can have several thousand interconnects. It is also possible to have defective, missing, or extra terminators connected to the bus. Thus, the development of electrical faults in the system, either initially or over time, is highly probable. In the past, finding electrical defects in a SCSI bus was typically done by trial and error. If a computer system was experiencing problems that could be attributed to a faulty SCSI bus interconnect, one could shut it down and replace some of the SCSI cables to see if the problem went away, repeating the procedure until the problem was solved or all the cables were replaced.
In another testing method, each cable and connector was jiggled, or otherwise stressed. This would be done while the system was running to see if an error could be deliberately induced, and detected by the system software, thereby indicating an intermittent connection. However, the timing relationship between the software and the intermittent connection would often not allow detection of the error. And even if the error was detected, several seconds might pass before it was indicated, possibly giving a false indication of the location if different regions were being stressed during that time period.
In accordance with the present invention a testing apparatus is provided for testing the integrity of a parallel data transmission device, such as an electronic bus cable or a bus terminator. The testing applies to a device having a plurality of data transmission paths on each of which a detectable signal, such as a bias voltage, may be generated. The normal bias signal, as present on one of the transmission paths, exhibits a significantly altered signal characteristic, e.g. a drop or increase in voltage level, when the transmission path is compromised. For each of the transmission paths in the device, the tester detects this type of signal alteration.
The tester includes a reference signal generator that provides a reference signal having an adjustable voltage level. The reference signal is compared to the signals on the transmission paths being tested using a comparison element, such as a plurality of comparator circuits. The comparison element identifies those transmission paths for which a signal on them has been significantly altered from what it should be. In particular, the voltage level of each different transmission path signal is compared to the reference voltage to determine if it is higher or lower.
In the preferred embodiment, the transmission paths are arranged as conductor pairs, each pair including a high voltage conductor and a low voltage conductor. Each high voltage conductor typically carries a high voltage DC signal when it is operating properly and not transmitting data. Similarly, each low voltage conductor carries a low voltage when under the same conditions. Therefore, two different reference voltages may be used, a high reference voltage that is compared to the voltages on the high voltage conductors, and a low reference voltage that is compared to the voltages on the low voltage conductors. In this embodiment of the comparison element, two comparator circuits are used per conductor pair, one for testing the low voltage conductor and one for testing the high voltage conductor.
An output mechanism, such as a plurality of LEDs, are provided to indicate which, if any, of the transmission paths were determined to have an error, based on the results of the comparison to the reference voltages. In the preferred embodiment, one LED is used per comparator, so that each conductor may be individually monitored. The reference voltages are preferably adjustable, and each of them is adjusted to sweep through a voltage range in which their respective high voltage conductors and low voltage conductors are expected to be. For example, the high reference voltage may be set at a value below any voltage expected to be present on any of the high voltage conductors, and then increased until the comparators for each of the high voltage conductors begin to switch output states, as the reference voltage surpasses the voltages on those conductors. If any of the comparators switches at a significantly different voltage level than a majority of the others, it indicates a fault with that comparators associated conductor which is causing it to carry the incorrect voltage. A similar test may be performed with the low voltage conductors by adjusting the low voltage reference.
To allow intermittent errors to be detected, the output mechanism for the tester may include latches that maintain an output state even after a detected error condition has passed. That is, if the illumination of an LED was to indicate the presence of an error on a particular conductor, the latch would hold the LED on, even if the error occurred only briefly and then passed. In the preferred embodiment, the output mechanism for the tester includes two LEDs for each conductor, one of which is latched and the other of which is not. If LEDs are arranged such that they may all be viewed simultaneously, a user may determine which of the conductors encounters an error, and under which conditions. For example, the reference voltages might be set at a level short of that ordinarily necessary to trigger an LED, and then the cable manually manipulated to induce stresses. If any intermittent errors were present on a given conductor, its corresponding non-latching LED would illuminate temporarily, while its latching LED would turn on and stay on until reset.
The tester may be used to test a bus cable, and may also be used to test a bus terminator. In either case, power is needed to establish the signals on the high and low conductors. In the preferred embodiment, the tester is capable of using the power from an existing system in which the cable is functioning, or supplying the necessary terminator power internally. An output meter may be incorporated into the tester that can display this terminator voltage, or the amplitudes of the reference voltages. In one embodiment, the tester also includes an audio indicator, such as a beeper, that gives an audio indication of the detection of an error.
In one embodiment of the invention, the tester is also capable of testing for a short circuit between conductors on a bus. In this embodiment, a control device is used to induce an error in the conductors of one pair, while disabling its output indicators. Meanwhile, since the other output indicators are not disabled, any short circuit to the conductor of another pair would result in that other conductor also showing an error. However, since the outputs of that other conductor pair are not disabled, the error would be detected. Preferably, the tester cycles through the conductor pairs, selectively forcing each of them to an error state while simultaneously disabling its outputs. If this technique is then combined with the use of latches in the output mechanism, any short circuit errors recorded during the sequencing of the conductor pairs would be detected.